Spin-Polarised Current

Spintronic devices for integrated logic circuits

Project details

We aim to develop four key spintronic devices in collaboration with Tohoku University in Japan and Technical University of Kaiserslautern in Germany as counterparts in a Core-to-Core Programme organised by the Japan Society for the Promotion of Science. We intend to investigate a spin transistor with an optical gate, an all Heusler alloy MRAM cell, spin-transfer torque induced by the spin See-beck effect and design a prototype logic circuit. Based on our ex-pertise, we anticipate to achieve three major milestones for next-generation integrated logic circuits: (i) instant power-on, (ii) low power consumption and (iii) less Joule heating. Each of these device concepts has the potential to be a component of an integrated spintronic logic and storage device. In addition to the technical activities this project will support an ambitious programme of exchange through the JSPS Core-to-Core Programme. We are committed to 9 exchanges per year giving a total of 45 exchanges to Germany but principally Japan over the 5 year period. This will be the largest programme of exchange in the field of magnetism ever undertaken from the UK.

This project will be carried out under the close collaboration with Profs. Hideo Ohno at the Laboratory for Electronic Intelligent Systems, Research Institute of Electrical Communications, Tohoku University and Burkard Hillebrands Magnetism Group, Department of Physics, Technische Universität Kaiserslautern.

Funding agency

EPSRC (EP/M02458X/1, value: GBP 856,918)

Starting date

01/04/2015 (for 5 years).

Ending date

31/03/2020.