Last updated: 22/08/2015
Recent updates
22/08/2015 This page launched.
Tohoku-York-Kaiserslautern Core-to-Core Project on
"New-Concept Spintronics Devices"
Project details
We aim to develop four key spintronic devices in collaboration among Tohoku University in Japan, the University of York in the UK
and Technical University of Kaiserslautern in Germany as counterparts in a Core-to-Core Programme organised by the
Japan Society for the Promotion of Science.
We intend to investigate a spin transistor with an optical gate, an all Heusler alloy MRAM cell, spin-transfer torque induced by
the spin See-beck effect and design a prototype logic circuit. Based on our ex-pertise, we anticipate to achieve three major
milestones for next-generation integrated logic circuits:
(i) instant power-on,
(ii) low power consumption and
(iii) less Joule heating.
Each of these device concepts has the potential to be a component of an integrated spintronic logic and storage device.
This project involves 17 principal investigators (PIs) from Japan, 5 PIs from the UK and 2 PIs from Germany. We also plan to collaborate with our affiliate institutions, such include the National Institute for Materials Science (NIMS), University of Electro-Communications and University of Tsukuba.
In addition to the technical activities this project will support an ambitious programme of exchange. We are committed to 30 exchanges per year among our partners, focusing on those for early-stage researchers. We will organise two symposia every year, one in Europe and another in Japan, to disseminate our achievements and to discuss them with the wider community.
This project will be carried out under the close collaboration with Profs. Hideo Ohno at the Laboratory for Electronic Intelligent Systems, Research Institute of Electrical Communications, Tohoku University, Kevin O'Grady at the Department of Physics, the University of York and Burkard Hillebrands Magnetism Group, Department of Physics, Technische Universität Kaiserslautern.
Project period
From 01/04/2015 to 31/03/2020 (for 5 years).
Acknowledgements
This project is funded through the JSPS Core-to-Core Program on "International Research Center for New-Concept Spintronics Devices" jointly with the EPSRC research grant on "Spintronic Devices for Integrated Logic Circuits" (EP/M02458X/1) and OPTIMAS.
